ESD Protection for Wireless Designs
Electrostatic discharge (ESD) is the sudden, uncontrolled release of static electrical energy. This discharge of electrical energy can damage sensitive integrated circuits, and wireless system designers must be aware of ESD.
Wireless system manufacturers are developing stricter ESD specifications, making the task of circuit board designers more difficult. A variety of different ESD standards exist, complicating the design effort. We consider the two most common international standards: human body model HBM (humanbodymodel) and IEC1000-4-2. The first standard simulates contact conditions and is applied to the device; the second standard is used for system-level ESD protection.
ESD protection for wireless designs faces special challenges. There are various techniques for ESD protection, each with their own advantages and disadvantages. However, for wireless designs, performance, circuit space, weight, power consumption and cost all favor the use of integrated diode protection networks.
Further, we will discuss how to apply the diode network to obtain the best ESD protection performance. Optimal performance is closely related to the layout of the circuit board to ensure that ESD currents can enter the protection device without damaging the sensitive integrated circuits. In addition, the use of diode protection network should pay attention to the power-down problem of the system. Finally, there is no easy way to relate the ESD protection performance of a device to the protection performance of a system, but specifying a clamping voltage to protect the device is an effective way to connect the two.
The ESD standard HBMESD test is usually used for integrated circuits, while IEC1000 defines the ESD test of the system. Both use the discharge ESD model of capacitors passing through current-limiting resistors (Figure 1). The difference is the size of the device value. For HBM, the capacitor value is 100pF and the current limiting resistor is 1500Ω. Note that the peak discharge current of IEC1000 is almost 5 times higher than that of HBM for the same ESD voltage. Further, IEC1000 uses contact discharge and air discharge methods to test equipment. The standard defines the ESD voltage of contact discharge as 2kV to 8kV, and the air contact can reach 15kV. Note that the current rise time specified by IEC1000 is less than 1ns, requiring a very fast response from the protection device (Figure 2). For the same reason, board layout is critical to achieving ESD protection for a system.
Protection methods If the ESD protection requirements of IEC1000-4-2 are to be met, wireless communication equipment needs proper protection. User-touched areas, such as buttons and I/O ports, are susceptible to ESD and therefore require protection. A simple technique is to place capacitors on the communication lines to absorb ESD pulses, which reduces the signal rate and increases the drive current consumption. A sparkgap can be used on the board. The sparkgap is designed to fuse during the ESD pulse, and the current is shunted into the ground. However, this technology takes up a large space and causes unreliable ESD protection after aging. MOV (metaloxidevaristor) devices can be turned off at high voltages and can be used in applications with slow response times. However, their bulkiness and large capacitance make them unsuitable for protecting signal lines, and an additional disadvantage is their aging characteristics.
For Zener diodes, although capable of clamping large currents at a given voltage, it produces parasitic capacitances that are not needed to guard the signal lines. In contrast, fast, low-capacitance diodes connected to ground and power are a good solution. They can handle large peak currents, have small reverse leakage currents, and can withstand multiple ESD strikes without damage; it successfully diverts ESD pulses away from sensitive protection devices and has a long lifespan. However, one diode pair is required per guard line. Despite the low price per device, the total installation cost and required space make a split solution unsuitable.
For example, 17 diode pairs are required to protect the IEEE-1284 parallel port. Integrating different numbers of diode pairs in a single package results in an optimal cost-effective solution.
The ESD protection principle of the integrated diode protection network diode array is very simple. A diode pair connected to the power supply and the ground is added to the protected signal line. During normal operation, these diodes are reverse biased, but forward bias occurs when the voltage on the signal line is higher or lower, respectively, than the voltage at the corresponding terminal. Forward bias occurs during an ESD pulse, when the diode draws current into the power supply or ground, leaving the protected device, which is only subjected to a small voltage and current shock.
Since integrated circuit I/O pins are designed to withstand 2kV HBMESD voltages, the protected device can withstand this energy, however this places more stringent requirements on the external diode network. According to the method of IEC1000-4-2, these networks need to resist "contact discharge" of 8kV. Further, it also needs to clamp the voltage behind it so that integrated circuits or other passive devices are not damaged. Finally, in order not to degrade the performance of the signal, the total capacitance of the diode pair should be less than 5pF.
Since wireless applications typically require small footprint packages, protection devices must be packaged in SOT, MSOP, and QSOP packages, which are more competitive than discrete solutions (Figure 3).
Optimizing ESD protection must pay attention to the design and installation of the circuit board. First, minimize the parasitic inductance between the ESD pulse entry point and the diode protection network (Figure 4). The parasitic inductance will resist rapid changes in the ESD pulse current, allowing the ESD current entering the diode network to flow into the protected device. In this regard, the designer should place the diode network between the inductor and the protected device, which improves ESD protection performance in two ways: the inductor resists rapid changes in current and spreads over time, reducing peak current; ESD The pulses are forced to pass through the diode network first, and only a small fraction of the pulses enter subsequent devices.
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